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30th IEEE VLSI Test Symposium
(VTS 2012)

April 23-25, 2012
Hayatt Maui, Hawai, USA

http://www.tttc-vts.org

Submission of PDF Deadline Extended to October 21, 2011!
CALL FOR PAPERS
Scope -- Submissions -- Key Dates -- Additional Information

Scope

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The IEEE VLSI Test Symposium (VTS) explores emerging trends and novel concepts in testing, and verification & validation of microelectronic circuits and systems. Major topics include, but are not limited to:

  • Analog, Mixed-Signal & RF Test
  • ATPG & Compression
  • ATE Architecture & Software
  • Built-In Self-Test (BIST)
  • Defect & Current Based Test
  • Defect/Fault Tolerance
  • Delay & Performance Test
  • Design for Testability (DFT)
  • Design Verification/Validation
  • Diagnosis and Debug
  • Design for Test(ability) (DfT)
  • Design Verification and Validation
  • Diagnosis and Debug
  • Embedded System & Board Test
  • Embedded Test Methods
  • Emerging Technologies Test
  • FPGA Test
  • Fault Modeling and Simulation
  • Low-Power IC Test
  • Microsystems, MEMS and Sensor Test
  • Memory Test and Repair
  • On-Line Test & Self-Repair
  • Power and Thermal Issues in Test
  • System-on-Chip (SOC) Test
  • System-in-Package & 3D Test
  • Test Standards
  • Test Economics
  • Test of Biomedical Devices
  • Test of High-Speed I/O
  • Test Quality and Reliability
  • Test Resource Partitioning
  • Transients and Soft Errors

Submissions

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The VTS Program Committee invites original, unpublished paper submissions for VTS 2012. Paper submissions should be complete manuscripts, up to six pages (inclusive of figures, tables, and bibliography) in a standard IEEE two-column format; papers exceeding the page limit will be returned without review. Authors should clearly explain the significance of the work, highlight novel features, and describe its current status. On the title page, please include: author name(s) and affiliation(s), and the mailing address, phone number, fax number, and e-mail address of the contact author. A 50-word abstract and five keywords identifying the topic area are also required.

Proposals for the Innovative Practices tracks, and Special Sessions are also invited. The innovative practices track will highlight cutting-edge challenges faced by test practitioners, and innovative solutions employed to address them. Special sessions can include panels, embedded tutorials, or hot topic presentations. Innovative practices track and special session proposals should include a title, name and contact information of the session organizer(s), a 150-to-200 word abstract, and a list of prospective participants.

Detailed instructions for submissions are to be found at the conference website http://www.tttc-vts.org. A submission will be considered as evidence that, upon acceptance, the author(s) will submit a final camera-ready version of the paper for inclusion in the proceedings, and will present the paper at the symposium. The registration of at least one author is required for publication. In the case of innovative practice and special sessions, the organizers commit to submit a session title, abstract, and list of participants for inclusion in the symposium proceedings and program.

VTS 2012 will present a Best Paper Award, a Best Panel Award, and a Best IP Track Session Award based on the evaluations of reviewers, attendees, and an invited panel of judges. We also plan to organize a Student Poster Competition and a TTTC Best Doctoral Thesis Contest, details will be available later. The best papers of VTS 2012 (technical and IP sessions) will be invited to re-submit to the IEEE Design and Test of Computers.

TTTC Test Technology Educational Program (TTEP) tutorials on emerging test technology topics will be offered during VTS 2012. Tutorial proposals should be submitted according to TTEP 2012 submission deadlines (http://computer.org/tab/tttc/teg/ttep).

Key Dates

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Title and abstract submission for scientific papers, IP tracks and special sessions: October 8th, 2011
PDF upload: October 21st, 2011 (EXTENDED)
Notification of acceptance:January 7th, 2012

Additional Information
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Cecilia Metra – General Chair
U. of Bologna
Bologna, Italy
Tel: +39 051 2093038, Fax: +39 051 2093073
E-Mail: cecilia.metra@unibo.it

Claude Thibeault – Program Chair
Department of Electrical Engineering Ecole de technologie superieure
Montreal, Canada
Tel: +1 (514) 396-8669, Fax: +1 (514) 396-8684
E-Mail: claude.thibeault@etsmtl.ca

For more information, visit us on the web at: http:///www.tttc-vts.org

The VLSI Test Symposium (VTS 2012 ) is sponsored by the Institute of Electrical and Electronics Engineers (IEEE) Computer Society's Test Technology Technical Council (TTTC).


IEEE Computer Society- Test Technology Technical Council

TTTC CHAIR
Adit D. SINGH
Auburn University - USA
Tel. +1-334-844-1847
E-mail adsingh@eng.auburn.edu

PAST CHAIR
André IVANOV
University of British Columbia - Canada
Tel. +1-604-822-6936
E-mail ivanov@ece.ubc.ca

TTTC 1ST VICE CHAIR
Michael NICOLAIDIS
TIMA Laboratory - France
Tel. +33-4-765-74696
E-mail michael.nicolaidis@imag.fr

SECRETARY
Joan FIGUERAS
UPC Barcelona Tech - Spain
Tel. +
E-mail figueras@eel.upc.edu

ITC GENERAL CHAIR
Doug YOUNG
- USA
Tel. +1-602-617-0393
E-mail doug0037@aol.com

TEST WEEK COORDINATOR
Yervant ZORIAN
Synopsys, Inc.- USA
Tel. +1-650-584-7120
E-mail Yervant.Zorian@synopsys.com

TUTORIALS AND EDUCATION
Dimitris GIZOPOULOS

University of Athens
- Greece
Tel. +30-210-7275145
E-mail dgizop@di.uoa.gr

STANDARDS
Rohit KAPUR

Synopsys
, Inc. - USA
Tel. +1-650-934-1487
E-mail rkapur@synopsys.com

EUROPE
Matteo SONZA REORDA
Politecnico di Torino - Italy
Tel.+39-011-564-7055
E-mail matteo.sonzareorda@polito.it

MIDDLE EAST & AFRICA
Ibrahim HAJJ
American University of Beirut - Lebanon
Tel. +961-1-341-952
E-mail ihajj@aub.edu.lb

STANDING COMMITTEES
André IVANOV
University of British Columbia - Canada
Tel. +1-604-822-6936
E-mail ivanov@ece.ubc.ca

ELECTRONIC MEDIA
Alfredo BENSO
Politecnico di Torino - Italy
Tel. +39-011-564-7080
E-mail alfredo.benso@polito.it

 

PRESIDENT OF BOARD
Yervant ZORIAN
Synopsys, Inc.- USA
Tel. +1-650-584-7120
E-mail Yervant.Zorian@synopsys.com

SENIOR PAST CHAIR
Paolo PRINETTO
Politecnico di Torino - Italy
Tel. +39-011-564-7007
E-mail Paolo.Prinetto@polito.it

TTTC 2ND VICE CHAIR
Chen-Huan CHIANG

Alcatel-Lucent
- USA
Tel. +1-973-386-6759
E-mail chen-huan.chiang@alcatel-lucent.com

FINANCE
Michael NICOLAIDIS
TIMA Laboratory - France
Tel. +33-4-765-74696
E-mail michael.nicolaidis@imag.fr

IEEE DESIGN & TEST EIC
Krish CHAKRABARTY
Duke University - USA
Tel. +1-
E-mail krish@ee.duke.edu

TECHNICAL MEETINGS
Chen-Huan CHIANG
Alcatel-Lucent
- USA
Tel. +1-973-386-6759
E-mail chen-huan.chiang@alcatel-lucent.com

TECHNICAL ACTIVITIES
Patrick GIRARD
LIRMM – France
Tel.+33 467 418 629
E-mail patrick.girard@lirmm.fr

ASIA & PACIFIC
Kazumi HATAYAMA
NAIST - Japan
Tel. +81 743 72 5221
E-mail k-hatayama@is.naist.jp

LATIN AMERICA
Victor Hugo CHAMPAC
Instituto Nacional de Astrofisica - Mexico
Tel.+52-22-470-517
E-mail champac@inaoep.mx

NORTH AMERICA
André IVANOV
University of British Columbia - Canada
Tel. +1-604-822-6936
E-mail ivanov@ece.ubc.ca

COMMUNICATIONS
Cecilia METRA
Università di Bologna - Italy
Tel. +39-051-209-3038
E-mail cmetra@deis.unibo.it

INDUSTRY ADVISORY BOARD
Yervant ZORIAN
Synopsys, Inc.- USA
Tel. +1-650-584-7120
E-mail Yervant.Zorian@synopsys.com